DOS and the BIOS were exceptionally slow at text. Essentially one character at a time winding their way through DOS to the BIOS and back.
Direct access to the text mode segment (0xb800 if I remember correctly) was much faster. The fonts were blitted out by hardware for every scan line, so you just changed the few thousand bytes of video memory at hundreds of thousands of bytes per second.
I think the ISA bus was potentially capable of 9.5 megabytes per second on the original IBM PC 5150, but I don't think the processor could come close to that. But I wouldn't be surprised if it was over a megabyte per second, which would mean you could repaint a 4000-byte 80×25 screen in 4 milliseconds. Clone CGAs would give you snow if you did that, though, so you had to limit your updates to the HBIs and VBIs, slowing the update speed visibly. IBM's actual hardware used dual-ported VRAM to avoid this problem.
The 8-bit ISA bus was theoretically capable of 1.19MB/s. The bus architecture always took 4 cycles per transfer (enforced by the 8288 which had a 4-cycle state machine, iirc one cycle for address, one for data, and two wait states), transferred 8 bits per transfer, and ran at the 4.77MHz frequency.
The actual usable bandwidth was always much lower, somewhere between 80kB/s to a bit over 380kB/s, depending on how you were using the bus, because the cpu needed to fetch its instructions on the same bus. In a way, the bus was usually always running at 1.19MB/s though, because all the basic devices (ROM, RAM, common simple ISA cards) were able to always respond in the basic 4-cycle transfer, it's just that most cycles were spent fetching instructions instead of actual data.
Later machines made the bus faster by increasing width, increasing clocks, and dropping one mandatory wait state at AT for 5.55MB/s theoretical, and dropping the last wait state in the fast clones for 8.33MB/s theoretical.
Thank you; I didn't even realize that the RAM chips on the motherboard were physically connected to the actual ISA bus! It sounds like you know a lot more than I do about it.
This is interesting, thanks! Just wondering if the REP and REPcc prefixes with LODSW/STOSW/MOVSW would have allowed higher transfer rates due to there being no need to decode instructions after the first loop cycle?
IBM's BIOS blanked the screen during scrolling because its own CGA hardware had single ported RAM and produced snow. Later clones were usually better, not the other way around.
[–] blackhaz 15 hours ago
[–] benlivengood 13 hours ago
Direct access to the text mode segment (0xb800 if I remember correctly) was much faster. The fonts were blitted out by hardware for every scan line, so you just changed the few thousand bytes of video memory at hundreds of thousands of bytes per second.
[–] kragen 5 hours ago
[–] Tuna-Fish 4 hours ago
The actual usable bandwidth was always much lower, somewhere between 80kB/s to a bit over 380kB/s, depending on how you were using the bus, because the cpu needed to fetch its instructions on the same bus. In a way, the bus was usually always running at 1.19MB/s though, because all the basic devices (ROM, RAM, common simple ISA cards) were able to always respond in the basic 4-cycle transfer, it's just that most cycles were spent fetching instructions instead of actual data.
Later machines made the bus faster by increasing width, increasing clocks, and dropping one mandatory wait state at AT for 5.55MB/s theoretical, and dropping the last wait state in the fast clones for 8.33MB/s theoretical.
[–] kragen 2 hours ago
[–] akoboldfrying 1 hour ago
[–] badc0ffee 3 hours ago
[–] kragen 2 hours ago
[–] vasac 15 hours ago